Questneers : Mingoo Seok (Columbia University), Dongsuk Jeon (Seoul National University)
Today’s CPUs and GPUs are based on von Neumann architecture. However, this structure has fundamental limitations in increasing energy efficiency and performance. Neuromorphic architecture, which has emerged as an alternative, is receiving attention for its potential to overcome the limitations of von Neumann architecture by mimicking the brain’s neurons and synapses. However, to complete this technology, technical difficulties exist in several aspects including fundamental understanding of neural networks, three-dimensional (3D) structure semiconductor design, and analog implementation. Can we implement neuromorphic chips with high computational efficiency like the brain by overcoming these technical difficulties?
Today’s CPUs and GPUs are based on von Neumann architecture. Von Neumann architecture refers to a structure that allows various tasks to be performed by reconfiguring the chip’s data path according to instructions. Simply put, it allows reuse by changing programs without having separate hardware for each task to be performed. For this, instructions (operators) and data (operands) necessary for computation must be brought to the computation circuit, and then work must be performed according to a predetermined order. In this von Neumann structure, companies have focused on improving computational performance and energy efficiency by miniaturizing transistors to enhance chip performance.
However, over the past 10 years, miniaturization technology has reached the atomic scale, revealing the limitations of the transistor miniaturization strategy, and accordingly, the development speed of technologies that improve energy efficiency and memory bottleneck phenomena is also slowing down.
Recently, neuromorphic computing is receiving attention as an alternative that can solve the fundamental limitations of von Neumann architecture and perform tasks more efficiently. The human brain is known as an efficient computational device that performs complex tasks while consuming only about 20W of power using a massive neural network composed of approximately 100 billion neurons and 100 trillion synapses. Also, unlike von Neumann architecture computers, the brain does not change data paths as tasks change, and since data is stored in the connection states between neurons themselves, the memory bottleneck phenomenon that appears in von Neumann architecture does not occur. Neuromorphic computing is receiving attention as a next-generation architecture that can increase energy efficiency while solving von Neumann bottleneck phenomena by mimicking the computational methods of the brain composed of neurons and synapses. Related to this, researchers in neuroscience and semiconductor design fields are studying neuromorphic algorithms and hardware structures through convergent approaches.
However, several technical and economic difficulties exist in realizing neuromorphic computing. First, how neurons inside the brain exchange signals is not yet accurately known. According to what is known so far, signal connections between neurons are very complex and delicate. Therefore, without clearly verified theories about inter-neuronal communication and learning algorithms, implementing neuromorphic architecture in its complete sense is very difficult. Second, while current semiconductor chips are designed based on planes (2D), neurons and synapses in the brain are connected three-dimensionally (3D). Therefore, implementing 3D-based neuromorphic architecture with current 2D-based semiconductor design is difficult, and completely new paradigms need to be introduced. Third, neurons and synapses in the brain perform computation and storage simultaneously in analog fashion, but implementing analog computational devices that are robust to changes in process, voltage, temperature (so-called PVT) with current semiconductor technology is very difficult. Robustness of analog computing must be increased through various research including robust processes that operate without leakage at cryogenic temperatures and development of new devices. Fourth, neuromorphic chips have more parts that need to be physically connected (hard-wired) than chips based on von Neumann architecture. This means that various neuromorphic chips with different physical connection structures according to usage must be able to be made quickly. For this, a new foundry ecosystem that can immediately supply neuromorphic chips as designed is needed.
Looking at the above difficulties, it can be said that there is a long way to go before actual implementation and commercialization of neuromorphic systems. However, many neuroscientists and semiconductor engineers are paying great attention to creating truly neuromorphic chips. Related research includes research that copies neuronal connection maps by measuring signals between neurons with ultra-high sensitivity through nano electrodes and utilizes this in semiconductor design, and research on large-scale neuromorphic chips (Loihi, TrueNorth) for neuromorphic algorithm development.
If this grand quest is achieved, it will be possible to surpass the current von Neumann architecture where the limitations of transistor miniaturization strategy are being revealed. Through this, individuals will be able to design and order personalized neuromorphic chips tailored to the tasks they need, and a completely new era of computing is expected to open.